XCVU9P-2FLGA2104I - Akabatanidzwa Masekete, Akamisikidzwa, FPGAs (Field Programmable Gate Array)
Product Attributes
TYPE | DESCRIPTION |
Category | Integrated Circuits (ICs) |
Mfr | AMD |
Series | Virtex® UltraScale+™ |
Package | Tray |
Product Status | Active |
DigiKey Programmable | Not Verified |
Nhamba yeLABs/CLBs | 147780 |
Nhamba yeLogic Elements/Masero | 2586150 |
Yese RAM Bits | 391168000 |
Nhamba yeI/O | 416 |
Voltage - Supply | 0.825V ~ 0.876V |
Mounting Type | Surface Mount |
Operating Temperature | -40°C ~ 100°C (TJ) |
Package / Nyaya | 2104-BBGA, FCBGA |
Supplier Device Package | 2104-FCBGA (47.5x47.5) |
Base Product Number | XCVU9 |
Zvinyorwa & Media
RESOURCE TYPE | LINK |
Datasheets | Virtex UltraScale+ FPGA Datasheet |
Ruzivo Rwezvakatipoteredza | Xiliinx RoHS Cert |
EDA Models | XCVU9P-2FLGA2104I by SnapEDA |
Environmental & Export Classifications
ATTRIBUTE | DESCRIPTION |
RoHS Status | ROHS3 Inoenderana |
Moisture Sensitivity Level (MSL) | 4 (72 Maawa) |
ECCN | 3A001A7B |
HTSUS | 8542.39.0001 |
FPGAs
Nheyo yekushanda:
MaFPGA anoshandisa pfungwa yakadai seLogic Cell Array (LCA), iyo mukati ine zvikamu zvitatu: Configurable Logic Block (CLB), Input Output Block (IOB) uye Internal Interconnect.Field Programmable Gate Arrays (FPGAs) zvishandiso zvinogoneka zvine dhizaini yakasiyana pane yechinyakare logic maseketi uye gedhi arrays sePAL, GAL uye CPLD zvishandiso.Iyo logic yeFPGA inoitwa nekurodha emukati static memory maseru ane yakarongwa data, hunhu hwakachengetwa mumaseru ekurangarira hunotaridza logic basa remaseru ane logic uye nzira iyo mamodule akabatana kune mumwe nemumwe kana kune I / O.Izvo zvakakosha zvakachengetwa mumasero ekuyeuka zvinotarisa basa rinonzwisisika remasero emagetsi uye nzira iyo ma modules akabatanidzwa kune mumwe nemumwe kana kuI / Os, uye pakupedzisira mabasa anogona kuitwa muFPGA, iyo inobvumira unlimited programming. .
Chip design:
Kuenzaniswa nedzimwe mhando dze chip dhizaini, chikumbaridzo chepamusoro uye yakanyanya kuomarara dhizaini yekuyerera inowanzodiwa maererano neFPGA machipisi.Kunyanya, dhizaini inofanirwa kunge yakabatana zvakanyanya neFPGA schematic, iyo inobvumira chiyero chakakura cheyakakosha chip dhizaini.Nekushandisa Matlab uye yakakosha dhizaini algorithms muC, zvinofanirwa kuitika kuwana shanduko yakatsetseka munzira dzese uye nekudaro ive nechokwadi chekuti inoenderana neyazvino mainstream chip dhizaini kufunga.Kana izvi zviri izvo, saka zvinowanzodikanwa kuisa pfungwa pakubatanidzwa kwakarongeka kwezvikamu uye mutauro unowirirana wekugadzira kuti uone kushandiswa uye kuverengeka chip design.Iko kushandiswa kweFPGAs kunogonesa bhodhi debugging, kodhi simulation uye mamwe ane hukama dhizaini mashandiro kuti ave nechokwadi chekuti kodhi iripo inonyorwa nenzira uye kuti mhinduro yekugadzira inosangana nezvinodiwa zvekugadzira.Pamusoro peizvi, madhizaini algorithms anofanirwa kuiswa pamberi kuitira kukwidziridza dhizaini yeprojekiti uye kushanda kweiyo chip kushanda.Semugadziri, nhanho yekutanga ndeyekuvaka chaiyo algorithm module iyo iyo chip kodhi ine hukama.Izvi zvinodaro nekuti pre-yakagadzirwa kodhi inobatsira kuve nechokwadi chekuvimbika kwegorgorithm uye inogonesa zvakanyanya iyo yakazara chip dhizaini.Iine yakazara bhodhi debugging uye simulation kuyedzwa, zvinofanirwa kuve zvichigoneka kudzikisa kutenderera nguva inopedzwa mukugadzira iyo chip yese panzvimbo uye kukwirisa iyo yakazara chimiro cheiyo hardware iripo.Ichi chitsva chigadzirwa dhizaini modhi inowanzoshandiswa, semuenzaniso, pakugadzira isina-standard hardware interfaces.
Dambudziko guru muFPGA dhizaini nderekujairana nehardware system uye zviwanikwa zvayo zvemukati, kuve nechokwadi chekuti mutauro wekugadzira unogonesa kurongeka kwakanaka kwezvikamu uye kugadzirisa kuverenga uye kushandiswa kwechirongwa.Izvi zvinoisawo zvinodikanwa zvakanyanya kumugadziri, uyo anoda kuwana ruzivo mumapurojekiti akawanda kuti asangane nezvinodiwa.
Iyo algorithm dhizaini inoda kutarisisa pane zvine musoro kuti ive nechokwadi chekupedzwa kwekupedzisira kweprojekiti, kupa zano rekugadzirisa dambudziko zvichienderana nemamiriro chaiwo eprojekiti, uye nekuvandudza kushanda kweFPGA.Mushure mekuona iyo algorithm inofanirwa kuve inonzwisisika kuvaka module, kufambisa iyo kodhi dhizaini gare gare.Pre-yakagadzirwa kodhi inogona kushandiswa mukodhi dhizaini yekuvandudza kugona uye kuvimbika.Kusiyana neASICs, maFPGA ane kupfupika kwekusimudzira uye anogona kusanganiswa nezvinodiwa dhizaini kuti achinje chimiro chehardware, izvo zvinogona kubatsira makambani kuvhura zvigadzirwa zvitsva nekukurumidza uye kusangana nezvinodiwa zvisiri-standard interface yekuvandudza kana maprotocol ekutaurirana asina kukura.